Reference Plane

2017-06-30  by:CAE仿真在線  來源:互聯(lián)網(wǎng)

Can anyone explain the advantages and disadvantages of using a power plane for a reference plane instead of a ground plane? I have always used both as a DC reference in the past. Now I am beginning to hear arguments that only GND planes should be used for critical signals.

This becomes somewhat impractical for some boards.


Theoretically they are same. Practically one might think of the return current paths having to jump de-coupling caps. For broadside-coupled diffpairs using the GND-VCC planes' pair there is also coupling of VCC to GND noise into the pair although this is practically common mode coupling. VCC to VCC plane pair is pretty much the same as GND-GND.

I think "peace of mind" factor is also somewhat a player in the "GND only ref plane" approach.


Ellis,

From a high speed digital perspective:

I can't think of a lot of advantages of using a power plane for reference. It can be done, and it works fine, under certain circumstances:

1. The power plane should be the power supply of the drivers for the critical traces. Or alternatively, the reference plane should be capacitively coupled to ground at the driver in order to provide a return current path through the decoupling capacitors for the driver supplies. You could also tie the caps between the two planes if you prefer.

2. If it is a bidirectional bus, and there are separate supplies for each component, then it is a good idea to make sure that you provide a return current path... ie caps between power planes at driver, or caps to ground for both planes at driver.

3. Most boards are ground referenced. I have seen cases where designers VCC reference a high speed bus, and then expect the bus to drive some sort of add-in card made by another vendor. The problem is that they have introduced a moat crossing through the connector. Now the problem can be fixed by placing caps to ground at the connector, but you have to remember to do this. And then there is the obvious problem of added component cost for doing this.

You see, power plane referencing adds additional concerns. It creates extra problems for the designer to worry about.

My recommendations:

Ground reference where possible.

If you are pressed for space in your stackup, then find busses that share the same supplies, and route the bus referencing that supply.

Do up front power plane planning before routing. Cartoon drawing will suffice, but you need to do this so that you know that you can get your critical busses where they need to go based on where you will place the

planes.

Hope this helps,

James J.


A few thoughts, extracted from my response to a similar question...

The original question from last October:

An internal signal layer in a multi-layer stackup is situated between ground and a power plane. If the power plane splits into two islands is the effect significant on the signal layer? (Dielectric thickness between layers = 8 mil.)

My response:

Assuming your planes are very wide, and since the space between the planes is kept small, there shouldn't be any significant effect to Z0 at these geometries.

I had the opportunity to measure impedances of stripline traces which run between ground and power planes.I found that the TDR was identical regardless of which plane I measured relative to.After some investigation,

I concluded that for the geometries involved (only 14mils between planes),the coupling between the planes was strong enough that, AC-wise, they were one and the same.

The identical situation should hold true for your configuration, if your planes are wide enough to have strong coupling between them and ground, and the space between the 2 planes isn't wide enough to cause a discontinuity.

In summary,

If there is strong coupling between the ground and power planes, they are essentially the same for high-speed reference. If they aren't strongly coupled, there will definitely be a difference between which is the reference. People have used "stitching caps." (capacitors between the two planes at the location where the signal transitions from one reference to another) to remedy the problem, but I'm skeptical of the value of these.

For the rise-times we're at today, I believe those caps. would have little real value (the parasitics would be too great). I.E., a TDR done without the caps. populated would look the same as one done with the caps. in place.

I believe the best approach is to either keep referenced to the same plane throughout the entire topology (and most chips reference signals to ground), or only transition between planes which are strongly coupled.

My 2 cents.

Jeff Loyer



Jeff,

If the stripline has an equal distance from the power and ground planes, then logically the measurements with respect to ground or power would be the same.

But your measurements also show that, a stripline between two ground planes (i.e., the two planes are shorted at measurement ports) would give the same results. Please correct me, if I misunderstood you.

Is this amount of AC decoupling achievable solely through the interplane capacitance?

Regards,

Ege



The short answer to your second question (Is this amount of AC decoupling achievable solely through the interplane capacitance?) is yes.

The short answer to your first question is yes, you would get the same measurement if you measured a trace between 2 ground planes. The following is a longer response to that question; it's an extract of an experiment I did:

I found that, when TDR'ing a stripline trace that was referenced to both power and ground, I got the same impedance whether decoupling caps were populated or not. Actually, instead of a cap, I physically shorted power and ground pins together at the launch point to keep even the parasitics of a capacitor out of the equation. What I found was that, for the stackup (5mil trace 7 mils above ground and 7 mils below Vcc),I saw no substantial difference, regardless of whether I measured:

(1) with the probe referenced to GND,

(2) referenced to VCC, and

(3) with GND and VCC shorted together (at the launch).

Also, TDR'ing between the two planes shows a dead short.

The risetime was ~50pS (a TEK TDR), and I even slowed the risetime down to 400pS, no change. I'm pretty sure rise-time is not a factor.

FURTHER INVESTIGATION (in case you're interested): I wondered if, by definition of this symmetrical stripline, there isn't enough capacitance between the planes that the return current has a low impedance path to the reference plane. I.E., TDR'ing between the 2 planes shows a dead short - no need for external caps (or a shorting bar, in my case).

This worked until I thought of the case of asymmetrical stripline - would the impedance measured depend on which plane you were referenced to? So, I built myself some crude asymmetric stripline (using a TDR characterization board from TEK as a starting point).

I took a microstrip trace and added a layer of Kapton tape over it, with a sheet of copper over that. This turned the microstrip into a stripline, with the 2nd plane floating. I TDR'ed the trace relative to Gnd, then relative to the floating plane, and with the planes shorted together at the source (again, relative to Gnd and the floating plane).

I then added another layer of Kapton tape between the trace and the floating plane, and repeated the measurements.

I did this until I had 8 layers of Kapton tape between the trace and the floating plane.

Granted, this was a pretty crude experiment and there were clearly some measurement errors, but some things were pretty obvious.

Findings:

1) Regardless of the Kapton thickness, the lower impedance measured (referenced to Gnd or the floating plane) was approximately the same as that as when the planes were shorted together.

2) With thin dielectrics (in the range that we typically use, < 7mils), the impedance was approximately the same regardless of which plane was used as a reference, and whether they were shorted together at the source.

Conclusions:

1) When TDR'ing stripline, it probably won't matter which plane we use as reference. If in doubt, I would TDR relative to whichever plane was closest to the trace. If still not convinced, I would short the 2 planes together at the source.

2) I would ensure that, when using stripline with both power and ground planes, the trace is closer to ground than power. This is assuming the signal is routed relative to ground elsewhere.

3) I believe that a correct model for what I'm seeing is - it's the parallel combination of Trace-to-Plane1, Trace-to-Plane1, and Plane-to-Plane impedances that makes up the final impedance for a trace, relative to either Plane1 or Plane2.

Jeff Loyer



Jeff,

This is the stuff of good engineering. Thanks for sharing it. I've made the same kinds of measurements myself with the same results.

Lee



Someone shared that they found my results non-intuitive. Just thought I'd share something to make others with the same impression feel better.

I found it very non-intuitive, at first, and still find parts of it very subtle. For instance, consider the following symmetrical stripline case:

X position: A B C

floating plane: ------<----<----<----<----<----<----<----<----

dielectric1:

trace layer: ->---->---->---->---->---->---->---->---->----

dielectric2:

ground plane: <<----<----<----<----<----<----<----<----<----

The TDR signal is launched at point A, and is propagating to the right (as indicated by the arrows on the trace layer).

Consider point B to be far from the TDR launch. At that point, 1/2 the return current is travelling on the floating plane, and 1/2 is travelling on the ground plane (indicated by the arrows to the left), since this is symmetrical stripline. At point A (the TDR launch), however, ONE HUNDRED PERCENT OF THE RETURN CURRENT must be traveling on the ground plane, since that's what the ground of the TDR is connected to. How does the portion of the return current traveling on the floating plane "magically" jump over to the ground plane? Clearly it's capacitive coupling, but that's a lot of current in a short distance.

This question vexed me for quite a while. Eric Bogatin was less surprised, and explained that, if you could look at the current densities close to point A, you would see the current reach zero at the plane's edge (it has to), be 1/2 the total current some distance from point A, and somewhere between those 2 extremes at points close to A. A 3-D solver would show it nicely (I'm lazy, and just took Eric's word).

Eventually, I could reconcile myself to what was physically happening, but the correct model for what was happening was VERY non-intuitive. If it was easy, we'd get minimum wage.

Jeff Loyer


Jeff,

In your experiments did you see ringing on the TDR response when the planes weren't connected together? I think there is a potential problem with plane resonances in a structure with no solid connections between

the planes. I believe that these will be narrow band effects, but potentially troublesome depending on the structure and the signals.

---Bob Lewandowski


I didn't notice them.

Jeff Loyer


Jeff,

In your discussion you indicated that the symmetrical stripline case was immune to power/gnd designations and adding extra caps and you also wondered whether the asymmetrical case would have the same performance.

I have a question in the conclusions section of your email: A conclusion you derive is:

2) I would ensure that, when using stripline with both power and ground planes, the trace is closer to ground than power.

This is assuming the signal is routed relative to ground elsewhere I guess I am confused because wouldn't this

a) generate the asymmetrical case that you are concerned with and

b) If the return current is evenly distributed on the power and ground planes (internally) then I think the

only problem will be the final connection.



Hi Charles,

This may not help, but I'll try. At some point, it gets difficult to get meanings across clearly without pictures and/or one-on-one interaction.

But, here goes...

In making that statement ("I would ensure that, when using stripline with both power and ground planes, the trace is closer to ground than power"), the main issue I'm trying to address is the possibility of a large portion of the return current travelling on the wrong plane, without a suitable means of getting to the correct reference plane at the source.

For the case of a thin dielectric between the two planes (below, I mention 7mils, which was my test case), it is a moot point. The inter-plane capacitance provides adequate coupling between the two planes such that the current transitioning between planes sees no increased impedance.

For the case of thicker dielectrics (frequently used), there is the potential that the portion of the return current traveling on the "power" plane will see a finite impedance between that power plane and the ground plane. In this case, the impedance of the trace is not the same as if the trace was sandwiched between two ground planes (with vias between them at the source). Note that this is a problem in both symmetrical and asymetrical stripline - the problem is caused by the thickness of the dielectric between the planes. So, what I'm suggesting is, in this case, you will want your trace closer to the ground plane to reduce the adverse effects caused by some of the return current travelling on the power plane.

In the case of symmetric stripline with a thick dielectric, other methods of solving the problem will be necessary. Perhaps decoupling caps between the power and ground planes at the source and/or receiver (though I'm very skeptical of their efficacy at current rise-times), or adjusting the stackup to accomodate the increased impedance.

Note: you can substitute "effectiveness" for "efficacy", but efficacy is much more fun to say.

And finally, this is my last day before an 8-week sabbatical, so I won't have much to say on the subject 'til September. Until then, I'll be more concerned with not becoming bear skat while backpacking in the US and Canada.

Have a great summer!

Jeff Loyer



開放分享:優(yōu)質(zhì)有限元技術(shù)文章,助你自學(xué)成才

相關(guān)標(biāo)簽搜索:Reference Plane ansysem電磁培訓(xùn)班 ansys SIwave培訓(xùn)課程 ansys maxwell hfss培訓(xùn)和分析 ansysem在線視頻教程 pcb 封裝分析仿真 Fluent、CFX流體分析 HFSS電磁分析 Ansys培訓(xùn) Abaqus培訓(xùn) Autoform培訓(xùn) 有限元培訓(xùn) 

編輯
在線報(bào)名:
  • 客服在線請(qǐng)直接聯(lián)系我們的客服,您也可以通過下面的方式進(jìn)行在線報(bào)名,我們會(huì)及時(shí)給您回復(fù)電話,謝謝!
驗(yàn)證碼

全國(guó)服務(wù)熱線

1358-032-9919

廣州公司:
廣州市環(huán)市中路306號(hào)金鷹大廈3800
電話:13580329919
          135-8032-9919
培訓(xùn)QQ咨詢:點(diǎn)擊咨詢 點(diǎn)擊咨詢
項(xiàng)目QQ咨詢:點(diǎn)擊咨詢
email:kf@1cae.com